Xprop Tool

The xprop tool is specified using the -tool xprop switch on the command line.

This filter will cause the verilog code (ASTs) to be instrumented such that X's are properly propagated by verilog simulation tools. This is used to reduce the simlulated differences between gatelevels representations and RTL. I a properly constructed design flow this greatly reduces the need for gate level simulation (which is much more expensive than RTL simulation). For a detailed description of the transformations done by vrq and the reasoning behind it see the Xprop Rational page.

Xprop Switches

Vrq adds instrumentation all constructs except clock gating. The switches below may be used to alter the default behavior:

• +xprop-disable-if Disable if instrumentation
• +xprop-disable-case Disable case instrumentation
• +xprop-disable-index Disable reference assignment instrumentation
• +xprop-disable-ternary Disable ’?’ instrumentation
• +xprop-enable-clock Enable instrumentation of clocks (to check clock gaters)

The following switches alter how variables and constructs are treated. By default all variables are assume to be able to be 0,1,x,z. You can selectively indicate certain variables can never be x using these switches:

• +xprop-nox-attr= <name>: Allow an attribute on a variable declaration to specify the variable will never be x. 'name' is the attribute name that will be used to indicate the variable will never be x. For instance if the switch +xprop-nox-attr=NOX is used then a variable tag as non-x by:

   (* NOX *) reg v1;          // indicate v1 is never x
   (* NOX *) wire w1, w2, w3; // indicate w1, w2 and w3 will never be x</pre>
  

• +xprop-int-nox Declare that all variables specified as integer will never be x. This is useful when the local design rules only use integers as index in loops, etc.

The +xprop-nox-attr= <name> switch may also be used to disable x-propagation on selected constructs:

• if

   // In the case below the attribute indicates that this if statement
   // should not be xprop'd.
   (* NOX *) if( condition ) ...
  

• case

   // In the case below the attribute indicates that this case statement
   // should not be xprop'd.
   (* NOX *) case( condition ) ...
  

• procedural blocks

   // In the case below the attribute indicates that all statements
   // between the begin/end pair should not be xprop'd.
   (* NOX *) begin
          ...
   end
  

• structural blocks

   // In the case below the attribute indicates that all statements
   // between the generate/endgenerate pair should not be xprop'd.
   (* NOX *) generate
          ...
   endgenerate
  

• functions

   // In the case below the attribute indicates that the function 
   // should not be xprop'd.
   (* NOX *) function funcName;
          ...
   endfunction
  

• task

   // In the case below the attribute indicates that the task 
   // should not be xprop'd.
   (* NOX *) task funcName;
          ...
   endtask
  

• module

   // In the case below the attribute indicates that the module 
   // should not be xprop'd.
   (* NOX *) task funcName;
          ...
   endmodule
  

• ternary operator

   // In the case below the attribute indicates that the ternary operator
   // should not be xprop'd.
   initial out = cond ? (* NOX *) true_expression : false_expression;
  

• clock blocks

   // In the case below the attribute indicates that the clock 
   // should not be xprop'd.
   if (* NOX *) @(posedge clock) ...
  

These switches alter other miscellaneous behaviors:

• +xprop-allow-casex Allow casex statements in instrumented code. Normally casex statements are disallowed due to the fact that an 'x' is treated as a true don't care in the matching criteria, making it no possible to instrument properly.
• +xprop-begin= <pragma> Supply a comment to append before the insertion of xprop instrumentation
• +xprop-end= <pragma> Supply a comment to post pend after the insertion of xprop instrumentation
• +xprop-clk-begin= <pragma> Supply a comment to append before the insertion of clock xprop instrumentation
• +xprop-clk-end= <pragma> Supply a comment to post pend after the insertion of clock xprop instrumentation
• +xprop-clk-edge-control=[!]<tickdefine> Supply a preprocessor tickdefine to enable instrumentation on both edges of the clock. ! indicates tickdefine disables both edges. If switch isn't supplied the behavior is single edge unless XPROP_BOTH_EDGES is defined.

Note these constructs are useful for either visually flagging xprop code or to enable other tools like coverage or synthesis to recognize the instrumentation. For example when the following switches +xprop-begin="coverage off" +xprop-end="coverage on" are used on this code snippet:

 if( cond ) begin
     a = b;
 end else begin
     a = b+1;
 end

This is the resultant output:

 if(cond) begin
    a = b;
 end else if(~cond) begin
    a = b+1;
 end
 // coverage off
 else begin
    a = 1'hx;
 end
 // coverage on